| Q&A: FAQ
Q&A: Technical Consultation
Q: If the wire bonding process is required for PCB mounting, what should be noticed in PCB manufacturing?
A: ENEPIG or ENIG are the most commonly selected surface treatments in PCB manufacture. For mounting Al wire, the recommended gold thickness is 3–4μ inches. For mounting Au wire, the minimum gold thickness should be 5μ inches.
Q: If the lead-free process is required for PCB mounting, what should be noticed in PCB manufacturing?
A: A lead-free process requires higher heat resistance than ordinary processes, and the minimum heat resistance must be 260°C. Therefore, TG150 or higher substrates are recommended.
Q: When printing legends on the PCB, can you also print the serial number?
A: Yes, we can also print the serial number in addition to the legends. We can also print the QR code for your inquiry.
Q: How long can PCBs be stored and how to store them?
A: The recommended PCB storage conditions are: 25°C and 60%RH. The PCB has no specific storage time. However, you are recommended to bake PCBs every three months to remove moisture and stress on the PCBs and use them immediately after baking. The recommended maximum storage length is 6 months to reduce solder rejection and board cracking.
Q: What is your delivery time?
A: In general, the sample delivery times are: 6 workdays for single-/double-sided PCBs; 7 workdays for 4-layer PCBs; and one more workday for each two additional layers. If special processes are required, additional length will be added according to process specifics.
In general, the delivery times of mass-produced products are: 10 workdays for single-/double-sided PCBs and 15 workdays for multilayer PCBs. If special processes are required, additional length will be added according to process specifics. In addition, the delivery time can be shortened for emergency purchase (with an emergency fee). Please consult our sales personnel for individual projects. The length for emergency production varies based on product specifics.
Q: What are the differences between HDI PCBs and ordinary PCBs?
A: HDI PCBs often require laser drilling, while ordinary PBCs only need mechanical drilling. As HDI PCBs are manufactured with the build-up method, the number of build-ups is more than that of ordinary PCBs, which require only one. Please refer to PCB Process-HDI Outline for more information.
Q: What is the monthly capacity of Cheer Time?
A: 200,000 ft².
Q: What are the options for soldering?
A: The options include traditional epoxy resin IR baking, UV hardening, liquid photo imageable solder mask, and dry film solder mask. Currently, liquid photo imageable solder mask is the method at Cheer Time.
Q: How to prevent the following types of soldering folds?
A: If ENIG is the surface treatment, peeling often occurs at the sharp corners due to attacks. In this case, the edge design of the guard ring can be changed into a curve to reduce ENIG attacks. Fine strips, sharp ends, or corners are prone to soldering folds in the ENIG process.
Q: Although the manufacturer makes PCBs according to the dimensions shown in the drawings, the size of completed PCBs is different from the actual PCB side. What are the causes for the expansion or shrinkage?
A: There are many causes for expansion or shrinkage in the final product. Therefore, we recommended the following controls:
a. Expansion/shrinkage of the inner film (negative).
b. No or insufficient compensation of the inner film (negative).
c. Substrate storage condition.
d. Mixing up the longitude and latitude of substrates and PP.
e. Substrates and PP are from different suppliers.
f. Cold lamination time is too short to cause a big difference between the inner and outer temperature
Q: What are the advantages of ENIG surface treatment?
a. Smooth surface
b. Long storage time
c. Support bonding
d. Good ICT support
e. Support cooling
f. Low contact impedance
Q: What are the impacts of transition from HASL to Lead Free HASL?
1. Solder Mask
In Lead Free HASL, the operating temperature of wave soldering is up to 270°C to cause heat impact on substrates. If the heat or acid resistance of the solder mask is low, soldering folds, side corrosion, or grid peeling are the common anomalies.
2. In HASL, folds are often found in vias to cause poor hold blocking. In addition, PCB cracking from thermal expansion also occurs if dedicated via mask is not used or drying is inadequate. Therefore, it is very important to choose heat-resistant masks and correct hole blocking methods.
Select substrates of medium to high Tg, and pay attention to the coefficient of thermal expansion (CTE).
4. Surface Cleanliness
Lead Free HASL operating at high temperatures can easily cause the evaporation or cracking of the organic compounds in the flux to lose the facilitation and wetting functions. Eventually, solder spattering will take place on the substrate or solder mask. Therefore, select flux with high viscosity. Although heat resistance and wetting are enhanced, the probability of false soldering or non-wetting also enhances.
When operating at high-temperature furnaces, lead-free solders have higher fluidity, particularly in vertical HASL/HAL. Due to surface tension, solders will deposit at a particular point to result in uneven coating. The specific gravity of lead-free vs. leaded solders is 7.5 vs. 8.4. As the specific gravity reduces, cohesive force and surface tension increase to reduce pad smoothness.
6. Higher Risk for Rework
The probability of the following will enhance: Thickening of the intermetallic compound (IMC) layer, via copper etching, solder heat resistance, loosening of independent pads and fiduciary marks, board cracking or via cracking.
Q: What is “wicking”?
A: It refers to the cementation of electroless copper plating among individual threads of the fiberglass section found on the wall of the sectioned via. As it looks like a loom or brush, it is thus called a “wick.”
From the sectional view, it is understood that there is a broken hole on the via wall which is hollowed when the residual moisture in the substrate is vaporized at high temperatures. Therefore, the condition of PTH is the key, and the control of voids in PTH is very important.
1. Poor drilling will result in hole wall roughness or damage.
2. Overspeed desmearing will cause chemical infiltration in fiberglass yarns, resulting in inward infiltration of electroless copper plating.
3. Low-quality substrates will result in fiberglass loosening.
4. The wicking effect takes place when via internals are too short.
1. Strict control of drilling parameters (knife feeding/retraction speeds, rotations) and the grinding quality of drill bits.
2. Control of the temperature and intensity of leavening/desmearing.
3. Use anti-CAF substrates and avoid low-quality materials.
4. Avoid too short via intervals.
Q: What are the advantages and disadvantages of organic solderability preservatives (OSP) surface treatment?
Q: What are the voids in PTH resulting from drilling?
A: There are five types of via cracks based on the causes of cracking in drilling:
1. Voids in hole blocks.
2. Voids caused by excessively rough hole wall.
3. Voids caused by drill bits in the hole.
4. Voids caused by oil on drill bits.
5. Voids caused by drill bit deviation.
Q: What are the effects of Dk and Df of substrates (PCB materials)?
1. Dk (dielectric constant OO/OOεr)
If the permittivity of the insultation materials in a multilayer board is higher, much of the energy for signal transmission has been stored in the materials. This will result in poor “signal integrity” and low “signal transmission rate.” Therefore, the lower the Dk of insulation materials, the better the quality of signal transmission. Currently, the best Dk value at 2.5 is found in PTFE boards at 1MHz, while the Dk value of FR4 boards is about 4.5.
2. Df (dissipation factor)
Df refers to the ratio between the signal energy loss in the insulation materials and residual energy in the wire. To facilitate HF signals to fly out of the PCB into the air, the lower the Df of the PCB, the better. By contrast, the higher the Df is, the poorer the signal quality is of RF communication products. In addition, the higher the frequency is, the lower the board Df should be. Like the case of a flight taking off, the taxiing runway should be very robust to reduce energy dissipation.