Special Process

Copper plated on board edge

A long slot along the edge of the board to be plated.

Wafer test board

N/A

VIA IN/ON PAD

VIA IN/ON PAD

Via-In-Pad (VIP) or Via-On-Pad (VOP)

Vias filled with epoxy and plated with copper on surface.

Countersink / Counterbore holes

Countersink holes V.S. Counterbore holes

Plated Castellated Holes

Also called “castellated holes”. Castellated features are vias that are routed through to create half hole for the purpose of creating an opening inside the side of the hole barrel.

About Company

Founded in 1987 in New Taipei City, Taiwan, Cheer Time has build a reputation in being a professional Printed circuit board (PCB) provider.

CHEER TIME Office

No. 311,Qionglin S. Rd., Xinzhuang Dist., New Taipei City 24264, Taiwan, R.O.C.

T/ +886-2-2205-2032

F/ +886-2-2205-3346

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Cheer Time, specialist manufacturer of printed circuit boards (PCB)
Cheer Time, specialist manufacturer of printed circuit boards (PCB)
Cheer Time, specialist manufacturer of printed circuit boards (PCB)